Wei Dai

Add precoding and RX reach to create attrs Summary: **Issue** On Broadcom multi-switch systems, SerDes can be created before the hw_agent receives the full port pin configuration. When the later port update supplies TX/RX precoding and RX reach, those values can be skipped, leaving hardware without the requested precoding or extended-reach programming. **Root cause** TX/RX precoding and RX reach were not part of `SaiPortSerdesTraits::CreateAttributes`. They were programmed by direct post-create `setAttribute()` calls after `checkPortSerdesAttributes()`. Because these values were outside the `SaiStore` create-attribute tuple and the Broadcom comparison, the late configuration looked unchanged and `programSerdes()` returned before the direct writes. `SaiStore` therefore had no tracked attribute change to reconcile. **Why this fixes the issue** This change makes TX/RX precoding and RX reach optional create attributes on supported Broadcom SDKs, populates them from pin configs before change detection, and compares them during Broadcom SerDes reconciliation. A late port configuration now changes the desired create-attribute tuple, so the unchanged-attributes early return is bypassed and `SaiStore` updates or recreates the SerDes object with the requested values. The direct post-create writes are removed, so creation and later updates use the same tracked path. Existing enable flags and ASIC feature checks remain enforced; link-training ports still skip RX reach while retaining precoding; and pre-13 Broadcom SDKs do not expose unsupported precoding attributes. Reviewed By: birdsoup, Protick666 Differential Revision: D121280234 fbshipit-source-id: 6464f7bcf84259f8212e8aa034e7decb08f4d9c4

Program ACL table bind points Summary: Create separate SWITCH-bound and PORT-bound SAI ACL table groups identified by stage and bind point. Create ACL tables with the matching SAI bind point, attach multiple tables to the port-bound group, and process both switch-state group maps. Reviewed By: jasmeetbagga Differential Revision: D117445897 fbshipit-source-id: cda23e45a0d13a0704553a14508b14b80b067476

Gate SAI precoding on port config Summary: Program per-lane TX and RX precoding values from the platform mapping only when the matching optional port config is enabled and link training is disabled. Use the per-port linkTraining config directly instead of a separate ASIC/port support gate, and reject configs that enable linkTraining together with either TX or RX precoding. On live config transitions, independently apply mapped values or reset the direction that relinquishes manual precoding ownership. Reviewed By: jasmeetbagga Differential Revision: D115774691 fbshipit-source-id: 6f209634ea61e84d1713314c4fa1e2ea843f063b

Populate port-bound ingress ACL state Summary: Populate a separate stage-keyed port-bound ACL table group map in switch state, store `ingressAclTableName` on each port, and validate that the referenced table exists in the PORT-bound ingress group. Reuse the existing ACL config application flow with a small table-name lookup across the switch-bound and port-bound state maps. Reviewed By: jasmeetbagga Differential Revision: D117461521 fbshipit-source-id: 8d0d5a4a47d05806f187d84cf438d71a709dbc34

Remove Trident2 ASIC support Summary: Remove `ASIC_TYPE_TRIDENT2`, `Trident2Asic`, BCM TD2 queue defaults, factory and build wiring, and the remaining Trident2-specific branches and tests from `fboss/agent`, since this is not used anywhere now. Simplify behavior shared by the remaining supported ASICs, including EAPOL and lookup-class qualifier setup and the 40G MAC loopback test. Reviewed By: Tianyu-Meta Differential Revision: D114112847 fbshipit-source-id: e9725aa92a2c91c86f8bf1fd561f9744238c39ea

Gate SAI precoding on port config Summary: re-apply D115774691, excluded linkTrainingSupportedOnPort part for now, this diff only focused on precoding programming. Program per-lane TX and RX precoding values from the platform mapping only when the matching optional port config is enabled. Preserve the `montblanc_precoding` flag as a fallback while port configs are populated, and reject configs that enable `linkTraining` together with either TX or RX precoding. Reviewed By: simuthus-fb Differential Revision: D117294466 fbshipit-source-id: 554918261fafca95f83a966efef78ddbdd08def3

Split SAI platform construction by vendor Summary: Just move around codes for now. This final goal of this diff stack is to make wedge_agent, wedge_agent_csco, wedge_agent_nvda binaries only build with related broadcom, cisco, nvidia platforms codes, respectively, see buck target improvements in later D113583401 Move SAI platform and port construction into vendor-specific translation units while preserving the existing broad source inclusion. This prepares the platform library for source-list narrowing without changing behavior in this layer. Reviewed By: simuthus-fb Differential Revision: D113583404 fbshipit-source-id: 72b03eb6c00649108de6981dc79183a5cc9dadee

Move internal system port config to ASICs Summary: Move SAI internal system port config ownership from individual SAI platform subclasses into ASIC-specific methods. `SaiPlatform` now asks the ASIC for neutral internal system port configs and converts them to `sai_system_port_config_t`, keeping SAI types out of the ASIC layer. The `HwAsic` base implementation intentionally returns an empty vector, and only J3, J4, Q4D, Ebro, and P200 provide non-empty implementations for the platforms that previously had platform-level overrides. Reviewed By: srikrishnagopu Differential Revision: D111496519 fbshipit-source-id: d832614dc124271ee6f009cfd3b22d6d0936135e

Create generic SAI Yangra platform Summary: Similar to what we have done for broadcom and cisco platforms at D111460520, add `GenericSaiYangraPlatform` and route `PLATFORM_YANGRA` and `PLATFORM_YANGRA2` through it, replacing the direct `SaiYangraPlatform` and `SaiYangra2Platform` instantiations while preserving Yangra2 `PtpMode` behavior in the shared Yangra switch attributes path. Note: SaiMinipack3NPlatform is kept as it is for now rather than replaced by GenericSaiYangraPlatform, since it needs additional platform level information for SAI_INDEPENDENT_MODULE_MODE (whether ASIC firmware is involved in transceiver programming) and SAI_KEY_PORT_CREATE_INITIAL_PRECODING (whether precoding should be turned off based on board signal integrity needs). Ideally these information should be obtained from PlatformDescriptor file, we will touch SaiMinipack3NPlatform later when refactoring platform mapping. Reviewed By: simuthus-fb Differential Revision: D112190670 fbshipit-source-id: 3821c88b5eb6c7adcd5359ead28cdf1bb75a117b

Add port-bound ingress ACL traffic test Summary: Add an AgentHwTest with one PORT-bound ingress ACL group containing two ACL tables. Bind different table names to two ports, verify each table independently permits its selected L4 destination port and drops other traffic with the expected counters, and verify traffic on an unbound port remains permitted. Reviewed By: jhshi Differential Revision: D117547590 fbshipit-source-id: b745044b57ac04a862b9fbf7c2d159b82dc00fe0